Currently a variety of semiconductor integrated circuit devices include capacitors as circuit elements. Typical of such integrated circuit devices are dynamic random access memories (DRAM) that utilize as the memory cell a capacitor as a storage element in series with a switch provided by a Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Such memory cells are formed in dense large arrays in the semiconductive chip. In a popular form of DRAM the storage capacitor of the memory cell is formed as a multilayer stack on the top surface of a silicon chip and the switch is an MOSFET in the chip adjacent its top surface. The lower plate of the capacitor stack serves as the storage node of the capacitor and a source/drain region of the transistor serves as the storage node of the switch and the two storage nodes are connected together advantageously by as low a resistance as is feasible. To this end, the capacitor is generally aligned so that its storage node overlies the source/drain region of the transistor and a conductive plug, typically of highly doped polysilicon, is used to interconnect the capacitor lower plate (electrode) and the transistor source/drain region.
In such a structure, the deposition of the layers to form the capacitor stack, which generally includes a pair of layers of a high conductivity metal, such as platinum, and an intermediate layer of material of a high dielectric constant, such as barium strontium titanate, generally needs to be done at a high temperature in an oxygen-containing atmosphere. Unfortunately, under such circumstances there is a tendency for the bottom plate of the capacitor, typically an electrode of platinum or other similar metal, such as iridium, palladium, ruthenium, or silver, to react with the conductive polysilicon plug used for the contact with undesirable results to the properties of the contact. To avoid this reaction, it is common to insert a diffusion barrier layer of a material, such as titanium nitride or tantalum nitride, between the doped polysilicon plug and the electrode. However, this diffusion barrier does add undesirable resistance to the connection between the two storage nodes. This resistance degrades the signal to noise ratio and thus reduces overall yield which increases cost.
The present invention seeks to ameliorate this problem.